UFRRJ/Technology Innovation Office · since 2008
/ nitrural@ufrrj.br
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Integrated circuit topography

Sui generis protection for the topography (layout) of integrated circuits — the three-dimensional arrangement of elements composing a semiconductor chip.

Law 11.484/2007 — provides incentives to the digital TV equipment and semiconductor component industries and addresses intellectual property protection of integrated circuit topographies.

Protection is distinct from patent: it covers the spatial configuration of the circuit, not the technical invention itself.

When it applies

Microelectronics research producing:

  • Original layouts of integrated circuits
  • Novel combinations of known elements that present a distinctive configuration

How to send to the Agency

UFRRJ is still structuring the submission flow for integrated circuit topographies. Researchers with technologies in this area should contact the Agency directly by email for case-by-case analysis.

Email: nitrural@ufrrj.br

Under construction. This area has reduced volume at the university and requires case-by-case analysis. To expand this guide with a standardized form and flow, please get in touch.

See also